Re: Remove Instruction Synchronization Barrier in spin_delay() for ARM64 architecture

On Thu, 1 May 2025 at 14:50, Nathan Bossart <nathandbossart@gmail.com> wrote:
> So...
>
> * The ISB does seem to have a positive effect without commit 3d0b4b1
>   applied.
>
> * With commit 3d0b4b1 applied, removing the ISB seems to have a positive
>   effect at high concurrencies.  This is especially pronounced in the
>   pgbench test.
>
> * With commit 3d0b4b1 applied, removing the ISB doesn't change much at
>   lower concurrencies, and there might even be a small regression.
>
> * At mostly lower concurrencies, commit 3d0b4b1 actually seems to regress
>   some test_shm_mq tests.  Removing the ISB instruction appears to help in
>   some cases, but not all.

Based on your findings Nathan, what is the best way to proceed for this change?
Do we need more validation for it? If yes, which kind?

Thanks,
Salvatore