alex@purefiction.net (Alexander Staubo) wrote:
> On Dec 12, 2006, at 13:32 , Michael Stone wrote:
>
>> On Tue, Dec 12, 2006 at 12:29:29PM +0100, Alexander Staubo wrote:
>>> I suspect the hardware's real maximum performance of the system is
>>> ~150 tps, but that the LSI's write cache is buffering the
>>> writes. I would love to validate this hypothesis, but I'm not
>>> sure how.
>>
>> With fsync off? The write cache shouldn't really matter in that
>> case. (And for this purpose that's probably a reasonable
>> configuration.)
>
> No, fsync=on. The tps values are similarly unstable with fsync=off,
> though -- I'm seeing bursts of high tps values followed by low-tps
> valleys, a kind of staccato flow indicative of a write caching being
> filled up and flushed.
If that seems coincidental with checkpoint flushing, that would be one
of the notable causes of that sort of phenomenon.
You could get more readily comparable numbers either by:
a) Increasing the frequency of checkpoint flushes, so they would be
individually smaller, or
b) Decreasing the frequency so you could exclude it from the time of
the test.
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