Re: Latches with weak memory ordering (Re: max_wal_senders must die)

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От Tom Lane
Тема Re: Latches with weak memory ordering (Re: max_wal_senders must die)
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Msg-id 2132.1290186828@sss.pgh.pa.us
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Ответ на Re: Latches with weak memory ordering (Re: max_wal_senders must die)  (Robert Haas <robertmhaas@gmail.com>)
Ответы Re: Latches with weak memory ordering (Re: max_wal_senders must die)  ("Kevin Grittner" <Kevin.Grittner@wicourts.gov>)
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Robert Haas <robertmhaas@gmail.com> writes:
> I think it would be useful to try to build up a library of primitives
> in this area.  For this particular task, we really only need a
> write-with-fence primitive and a read-with-fence primitive.

That's really entirely the wrong way to think about it.  You need a
fence primitive, full stop.  It's a sequence point, not an operation
in itself.  It guarantees that reads/writes occurring before or after
it aren't resequenced around it.  I don't even understand what "write
with fence" means --- is the write supposed to be fenced against other
writes before it, or other writes after it?

> I think it would also be useful to provide macros for
> compare-and-swap and fetch-and-add on platforms where they are
> available.

That would be a great deal more work, because it's not a no-op anywhere;
and our need for it is still rather hypothetical.  I'm surprised to see
you advocating that when you didn't want to touch fencing a moment ago.
        regards, tom lane


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