Re: Remove Instruction Synchronization Barrier in spin_delay() for ARM64 architecture

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От Nathan Bossart
Тема Re: Remove Instruction Synchronization Barrier in spin_delay() for ARM64 architecture
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Msg-id aJ-XsB542yajZzij@nathan
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Ответ на Re: Remove Instruction Synchronization Barrier in spin_delay() for ARM64 architecture  (Andres Freund <andres@anarazel.de>)
Ответы Re: Remove Instruction Synchronization Barrier in spin_delay() for ARM64 architecture
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On Fri, Aug 15, 2025 at 04:13:30PM -0400, Andres Freund wrote:
> IMO, the only way to actually make pg_stat_statements scale is to move to a
> model much more like our regular stats. I.e. accumulate counters in backend
> local memory and only occasionally update the shared stats.

Agreed.  I remember discussing something similar at pgconf.dev this year.

> FWIW, I'd not be surprised if moving to atomics would often cause *slowdowns*
> compared to using the spinlocks. You'd replace one atomic operation with
> dozens, to update all those fields individually. With loads of cacheline
> pingpong inbetween.

Right.  At some point I tried moving most things to atomics and leaving the
rest behind the spinlock, and IIRC there wasn't really any improvement.  I
didn't dig into whether that was because of atomic-related cache line
ping-pong or the existing spinlock, but regardless, I quickly discarded
that idea.

-- 
nathan



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