Re: [PATCH] Native spinlock support on RISC-V

On Wed, Nov 3, 2021 at 11:55 AM Thomas Munro <thomas.munro@gmail.com> wrote:
> 1.  Even though we're using generic built-ins for atomics, I guess we
> could still use a src/include/port/atomics/arch-riscv.h file so we
> have a place to define PG_HAVE_8BYTE_SINGLE_COPY_ATOMICITY when
> building for 64 bit.  We'd need to find the chapter-and-verse to
> justify that, of course, which I can try to do; if someone more
> familiar with the ISA/spec/manual can point to it I'm all ears.

I randomly remembered this topic after seeing an s390x announcement
from Christoph[1], and figured he or someone else might be interested
in the same observation about that platform.  That is, we finally got
around to defining this for ARM, but I bet one internet point that
RISCV64 and s390x have that property too (but would need to find a
written reference, or perhaps a similar declaration in the Linux
sources, etc):

$ git grep '#define PG_HAVE_8BYTE_SINGLE_COPY_ATOMICITY'
src/include/port/atomics/arch-arm.h:#define PG_HAVE_8BYTE_SINGLE_COPY_ATOMICITY
src/include/port/atomics/arch-ppc.h:#define PG_HAVE_8BYTE_SINGLE_COPY_ATOMICITY
src/include/port/atomics/arch-x86.h:#define PG_HAVE_8BYTE_SINGLE_COPY_ATOMICITY

[1] https://www.postgresql.org/about/news/postgresql-on-s390x-on-debian-and-ubuntu-2752/