Simon Riggs wrote:
> pSeries cache lines are 128 bytes wide, so I'd go straight to 128.
>
Hello :)
OK, that line of code is:
#define LWLOCK_PADDED_SIZE (sizeof(LWLock) <= 16 ? 16 : 32)
What should I change this to? I don't understand the syntax of the <= 16
? : stuff...
would a simple "#define LWLOCK_PADDED_SIZE 128" be sufficient?
>If you're renting all 8 CPUs, I'd drop to 4 and try that instead. With 8
>CPUs the contention will vary according to what each CPU is doing at any
>one time - when they all hit the contention spot, things will get worse.
>
>
>
We have a physical machine installed in our rack at the data centre,
rather than renting a virtual partition of a real machine... I'm not
sure how to enable/disable CPUs even with the help of 'smitty' :)
>The pSeries has good CPUs and great caching, so I'd expect contention to
>be somewhat more apparent as a bottleneck.
>
>
>
Yep, I expected 32MB of 'L3' cache would yield impressive results :)
Cheers,
Gavin.