Re: Reduce timing overhead of EXPLAIN ANALYZE using rdtsc?

Lukas Fittl <lukas@fittl.com> writes:
> FWIW, for archive's sake, drongo is green again now, thanks to commit
> 7fc36c5db550 (Avoid CPUID 0x15/0x16 for Hypervisor TSC frequency).

drongo may be happy, but Coverity is not:

166         uint64        loop_count;
167
168         loop_count = test_timing(test_duration, TIMING_CLOCK_SOURCE_SYSTEM, false);
>>>     CID 1691465:         Incorrect expression  (DIVIDE_BY_ZERO)
>>>     In function call "output", division by expression "loop_count" which may be zero has undefined behavior.
169         output(loop_count);

AFAICS it's correct to complain.  test_timing() visibly can return zero,
but of the three places where test_timing() is followed by output()
only one has a defense against that.

            regards, tom lane