Re: Latches with weak memory ordering (Re: max_wal_senders must die)

Robert Haas <robertmhaas@gmail.com> writes:
> I completely agree, but I'm not too sure I want to drop support for
> any platform for which we haven't yet implemented such primitives.
> What's different about this case is that "fall back to taking the spin
> lock" is not a workable option.

The point I was trying to make is that the fallback position can
reasonably be a no-op.

> That's good to hear.  I'm more worried, however, about architectures
> where we supposedly have TAS but it isn't really TAS but some
> OS-provided "acquire a lock" primitive.  That won't generalize nicely
> to what we need for this case.

I did say we need some research ;-).  We need to look into what's the
appropriate primitive for any such OSes that are available for PPC or
MIPS.  I don't feel a need to be paranoid about it for other
architectures.
        regards, tom lane