rmurray@debian.org writes:
> If performance is important, I doubt people will be using a MIPS1
> platform without ll/sc. Any sane chip today, if it only complies with
> MIPS1 tends to have ll/sc as well. It is this case of a mostly MIPS1 chip
> that also implements ll/sc that can have the performance benefits of using
> the opcodes passed along.
Hm. Okay, that's a fair argument. I'll leave it be ...
regards, tom lane