On Tue, Apr 02, 2024 at 12:11:59AM +0300, Ants Aasma wrote:
> What about using the masking capabilities of AVX-512 to handle the
> tail in the same code path? Masked out portions of a load instruction
> will not generate an exception. To allow byte level granularity
> masking, -mavx512bw is needed. Based on wikipedia this will only
> disable this fast path on Knights Mill (Xeon Phi), in all other cases
> VPOPCNTQ implies availability of BW.
Sounds promising. IMHO we should really be sure that these kinds of loads
won't generate segfaults and the like due to the masked-out portions. I
searched around a little bit but haven't found anything that seemed
definitive.
--
Nathan Bossart
Amazon Web Services: https://aws.amazon.com