On Mon, Mar 26, 2001 at 06:35:59PM -0500, Tom Lane allegedly wrote:
> Thomas Lockhart <lockhart@alumni.caltech.edu> writes:
> >> Anyway, the last CVS update to port/ultrix.h that appears to have come
> >> from someone actually using Ultrix was rev 1.2 on 7-May-97, which
> >> predates the very existence of s_lock.h as a separate file. So I'd
> >> definitely advise Alexander to find a tarball from that era and look at
> >> how Ultrix was handled then.
> >> I dunno if we even have tarballs from that far back on-line ... I
> >> suppose another possibility is a date-based pull from the CVS server.
>
> > What can we help with Alex?
>
> After digging around in the old code I have to retract my opinion that
> a test-and-set implementation used to exist for MIPS. The code did
> have SysV-semaphore-based support for machines without test-and-set,
> and undoubtedly that's what was used on the old Ultrix port. (The
> non-test-and-set code was broken for awhile, but I'd forgotten that
> it formerly worked.)
>
> The non-test-and-set case should work again in current CVS, and I'd
> appreciate it if Alexander would verify that. But as far as getting
> some test-and-set support for MIPS goes, it looks like the only way
> is for someone to sit down with a MIPS assembly manual. I haven't
> got one, nor access to a machine to test on...
I've got access to an Indigo² (IRIX 6.5, MIPS R10000), another Indigo²
(IRIX 6.2, MIPS R4400) and a DECStation (NetBSD 1.?, MIPS R3000). The
DECStation (also known as PMAX) originally ran Ultrix. If anybody has
some code that needs testing, I'd be more than willing. However, if
test-and-set works anything like I imagine, we really need to test it
on a multi-cpu MIPS machine. A good starting point might be the
test-and-set code in the NetBSD and Linux MIPS kernels.
Btw. Everything you never wanted to know about the MIPS architecture: http://www.mips.com/Documentation/
Cheers,
Mathijs
--
"A book is a fragile creature. It suffers the wear of time,it fears rodents, the elements, clumsy hands."
UmbertoEco