On Wed, Nov 16, 2011 at 11:11 PM, Tom Lane <tgl@sss.pgh.pa.us> wrote:
> Robert Haas <robertmhaas@gmail.com> writes:
>> (I wonder if we shouldn't just align every shared memory allocation to
>> 64 or 128 bytes. It wouldn't waste much memory and it would make us
>> much more resistant to performance changes caused by minor
>> modifications to the shared memory layout.)
>
> I could get behind this idea if we had a reasonably clear idea of the
> hardware's cache line width, but AFAIK there is no portable way to
> identify that. (This is a pretty fatal objection to Simon's original
> patch as well...)
I don't think it's very important to know the exact size. As far as I
can tell, x64 is 64 bytes and Itanium and Power are 128 bytes. If you
optimize for those, you'll also handle any smaller size (that's a
power of two, without which a lot of things we do are wrongheaded)
without wasting much memory. If you run into hardware with a giant
256-byte or large cache line, you might have some sharing, but you
can't win 'em all.
--
Robert Haas
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