Re: Latches with weak memory ordering (Re: max_wal_senders must die)

Markus Wanner <markus@bluegap.ch> writes:
> Well, that certainly doesn't apply to full fences, that are not specific
> to a particular piece of memory. I'm thinking of 'mfence' on x86_64 or
> 'mf' on ia64.

Hm, what do those do exactly?  We've never had any such thing in the
Intel-ish spinlock asm, but if out-of-order writes are possible I should
think we'd need 'em.  Or does "lock xchgb" imply an mfence?
        regards, tom lane