From c2060ada9078b2dd22893c678c77ebaa2962fb05 Mon Sep 17 00:00:00 2001
From: Nathan Bossart <nathan@postgresql.org>
Date: Mon, 27 Apr 2026 14:32:12 -0500
Subject: [PATCH v2 1/1] avoid ranlib warnings on macOS

---
 configure                  | 83 ++++++++++++++++++++++++++++++++++++--
 configure.ac               | 44 ++++++++++++++++++--
 meson.build                | 48 ++++++++++++++++++++++
 src/Makefile.global.in     |  4 ++
 src/include/c.h            | 19 ---------
 src/include/pg_config.h.in |  6 +++
 src/makefiles/meson.build  |  2 +-
 src/port/Makefile          | 10 ++++-
 src/port/meson.build       |  4 +-
 9 files changed, 189 insertions(+), 31 deletions(-)

diff --git a/configure b/configure
index f66c1054a7a..79c7513782b 100755
--- a/configure
+++ b/configure
@@ -647,7 +647,9 @@ MSGFMT_FLAGS
 MSGFMT
 PG_CRC32C_OBJS
 CFLAGS_CRC
+USE_NEON
 LIBOBJS
+HAVE_X86_64_POPCNTQ
 OPENSSL
 ZSTD
 LZ4
@@ -15469,6 +15471,8 @@ _ACEOF
 fi
 
 
+HAVE_X86_64_POPCNTQ=0
+
 case $host_cpu in
   x86_64)
     # On x86_64, check if we can compile a popcntq instruction
@@ -15490,15 +15494,13 @@ long long x = 1; long long r;
 }
 _ACEOF
 if ac_fn_c_try_compile "$LINENO"; then :
-  pgac_cv_have_x86_64_popcntq=yes
-else
-  pgac_cv_have_x86_64_popcntq=no
+  HAVE_X86_64_POPCNTQ=1
 fi
 rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
 fi
 { $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_have_x86_64_popcntq" >&5
 $as_echo "$pgac_cv_have_x86_64_popcntq" >&6; }
-    if test x"$pgac_cv_have_x86_64_popcntq" = xyes ; then
+    if test x"$HAVE_X86_64_POPCNTQ" = x"1" ; then
 
 $as_echo "#define HAVE_X86_64_POPCNTQ 1" >>confdefs.h
 
@@ -15548,6 +15550,8 @@ $as_echo "#define HAVE_I_CONSTRAINT__BUILTIN_CONSTANT_P 1" >>confdefs.h
   ;;
 esac
 
+
+
 # Check largefile support.  You might think this is a system service not a
 # compiler characteristic, but you'd be wrong.  We must check this before
 # probing existence of related functions such as fseeko, since the largefile
@@ -17906,6 +17910,77 @@ $as_echo "#define USE_AVX2_WITH_RUNTIME_CHECK 1" >>confdefs.h
   fi
 fi
 
+# Check for the availability of NEON intrinsics.
+#
+# We use the Neon instructions if the compiler provides access
+# to them (as indicated by __ARM_NEON) and we are on aarch64.
+# While Neon support is technically optional for aarch64, it
+# appears that all available 64-bit hardware does have it.
+# Neon exists in some 32-bit hardware too, but we could not
+# realistically use it there without a run-time check, which
+# seems not worth the trouble for now.
+#
+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+int
+main ()
+{
+
+#if !defined(__aarch64__) || !defined(__ARM_NEON)
+#error compiler does not advertise NEON intrinsics
+#endif
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+  USE_NEON=1
+else
+  USE_NEON=0
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+if test x"$USE_NEON" == x"1"; then
+
+$as_echo "#define USE_NEON 1" >>confdefs.h
+
+fi
+
+
+# Check for SSE2 intrinsics
+#
+# SSE2 instructions are part of the spec for the 64-bit x86
+# ISA.  We assume that compilers targeting this architecture
+# understand SSE2 intrinsics.
+#
+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+int
+main ()
+{
+
+#if !defined(__x86_64__) && !defined(_M_AMD64)
+#error compiler does not advertise SSE2 intrinsics
+#endif
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+  USE_SSE2=1
+else
+  USE_SSE2=0
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+if test x"$USE_SSE2" == x"1"; then
+
+$as_echo "#define USE_SSE2 1" >>confdefs.h
+
+fi
+
 # Check for XSAVE intrinsics
 #
 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for _xgetbv" >&5
diff --git a/configure.ac b/configure.ac
index 8d176bd3468..c77b1819f78 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1756,6 +1756,8 @@ AC_CHECK_TYPES([struct option], [], [],
 #include <getopt.h>
 #endif])
 
+HAVE_X86_64_POPCNTQ=0
+
 case $host_cpu in
   x86_64)
     # On x86_64, check if we can compile a popcntq instruction
@@ -1764,9 +1766,8 @@ case $host_cpu in
     [AC_COMPILE_IFELSE([AC_LANG_PROGRAM([],
 	[long long x = 1; long long r;
 	 __asm__ __volatile__ (" popcntq %1,%0\n" : "=q"(r) : "rm"(x));])],
-	[pgac_cv_have_x86_64_popcntq=yes],
-	[pgac_cv_have_x86_64_popcntq=no])])
-    if test x"$pgac_cv_have_x86_64_popcntq" = xyes ; then
+	[HAVE_X86_64_POPCNTQ=1])])
+    if test x"$HAVE_X86_64_POPCNTQ" = x"1" ; then
 	AC_DEFINE(HAVE_X86_64_POPCNTQ, 1, [Define to 1 if the assembler supports X86_64's POPCNTQ instruction.])
     fi
   ;;
@@ -1794,6 +1795,8 @@ case $host_cpu in
   ;;
 esac
 
+AC_SUBST(HAVE_X86_64_POPCNTQ)
+
 # Check largefile support.  You might think this is a system service not a
 # compiler characteristic, but you'd be wrong.  We must check this before
 # probing existence of related functions such as fseeko, since the largefile
@@ -2162,6 +2165,41 @@ if test x"$host_cpu" = x"x86_64"; then
   fi
 fi
 
+# Check for the availability of NEON intrinsics.
+#
+# We use the Neon instructions if the compiler provides access
+# to them (as indicated by __ARM_NEON) and we are on aarch64.
+# While Neon support is technically optional for aarch64, it
+# appears that all available 64-bit hardware does have it.
+# Neon exists in some 32-bit hardware too, but we could not
+# realistically use it there without a run-time check, which
+# seems not worth the trouble for now.
+#
+AC_COMPILE_IFELSE([AC_LANG_PROGRAM([], [
+#if !defined(__aarch64__) || !defined(__ARM_NEON)
+#error compiler does not advertise NEON intrinsics
+#endif
+])], [USE_NEON=1], [USE_NEON=0])
+if test x"$USE_NEON" == x"1"; then
+  AC_DEFINE(USE_NEON, 1, [Define to 1 if compiler understands AArch64 NEON intrinsics.])
+fi
+AC_SUBST(USE_NEON)
+
+# Check for SSE2 intrinsics
+#
+# SSE2 instructions are part of the spec for the 64-bit x86
+# ISA.  We assume that compilers targeting this architecture
+# understand SSE2 intrinsics.
+#
+AC_COMPILE_IFELSE([AC_LANG_PROGRAM([], [
+#if !defined(__x86_64__) && !defined(_M_AMD64)
+#error compiler does not advertise SSE2 intrinsics
+#endif
+])], [USE_SSE2=1], [USE_SSE2=0])
+if test x"$USE_SSE2" == x"1"; then
+  AC_DEFINE(USE_SSE2, 1, [Define to 1 if compiler understands x86_64 SSE2 intrinsics.])
+fi
+
 # Check for XSAVE intrinsics
 #
 PGAC_XSAVE_INTRINSICS()
diff --git a/meson.build b/meson.build
index 20b887f1a1b..6876999b3ee 100644
--- a/meson.build
+++ b/meson.build
@@ -2468,6 +2468,54 @@ int main(void)
 endforeach
 
 
+###############################################################
+# Check for the availability of NEON intrinsics.
+#
+# We use the Neon instructions if the compiler provides access
+# to them (as indicated by __ARM_NEON) and we are on aarch64.
+# While Neon support is technically optional for aarch64, it
+# appears that all available 64-bit hardware does have it.
+# Neon exists in some 32-bit hardware too, but we could not
+# realistically use it there without a run-time check, which
+# seems not worth the trouble for now.
+###############################################################
+
+if host_cpu == 'aarch64'
+
+  neon_test = '''
+#if !defined(__aarch64__) || !defined(__ARM_NEON)
+#error "Compiler does not advertise NEON intrinsics"
+#endif
+'''
+
+  if cc.compiles(neon_test, name: 'AArch64 NEON intrinsics')
+    cdata.set('USE_NEON', 1)
+  endif
+endif
+
+
+###############################################################
+# Check for the availability of SSE2 intrinsics.
+#
+# SSE2 instructions are part of the spec for the 64-bit x86
+# ISA.  We assume that compilers targeting this architecture
+# understand SSE2 intrinsics.
+###############################################################
+
+if host_cpu == 'x86_64'
+
+  sse2_test = '''
+#if !defined(__x86_64__) && !defined(_M_AMD64)
+#error "Compiler does not advertise SSE2 intrinsics"
+#endif
+'''
+
+  if cc.compiles(sse2_test, name: 'x86_64 SSE2 intrinsics')
+    cdata.set('USE_SSE2', 1)
+  endif
+endif
+
+
 ###############################################################
 # Check for the availability of XSAVE intrinsics.
 ###############################################################
diff --git a/src/Makefile.global.in b/src/Makefile.global.in
index cef1ad7f87d..c7d797e452a 100644
--- a/src/Makefile.global.in
+++ b/src/Makefile.global.in
@@ -588,6 +588,10 @@ endif
 show_dl_suffix:
 	@echo $(DLSUFFIX)
 
+# AArch64/NEON and x86_64/POPCNTQ intrinsics
+USE_NEON = @USE_NEON@
+HAVE_X86_64_POPCNTQ = @HAVE_X86_64_POPCNTQ@
+
 
 ##########################################################################
 #
diff --git a/src/include/c.h b/src/include/c.h
index 97ed8c63f5e..aa43d302057 100644
--- a/src/include/c.h
+++ b/src/include/c.h
@@ -1333,25 +1333,6 @@ typedef struct PGAlignedXLogBlock PGAlignedXLogBlock;
 	 (underlying_type) (expr))
 #endif
 
-/*
- * SSE2 instructions are part of the spec for the 64-bit x86 ISA. We assume
- * that compilers targeting this architecture understand SSE2 intrinsics.
- */
-#if (defined(__x86_64__) || defined(_M_AMD64))
-#define USE_SSE2
-
-/*
- * We use the Neon instructions if the compiler provides access to them (as
- * indicated by __ARM_NEON) and we are on aarch64.  While Neon support is
- * technically optional for aarch64, it appears that all available 64-bit
- * hardware does have it.  Neon exists in some 32-bit hardware too, but we
- * could not realistically use it there without a run-time check, which seems
- * not worth the trouble for now.
- */
-#elif defined(__aarch64__) && defined(__ARM_NEON)
-#define USE_NEON
-#endif
-
 /* ----------------------------------------------------------------
  *				Section 9: system-specific hacks
  *
diff --git a/src/include/pg_config.h.in b/src/include/pg_config.h.in
index 4f8113c144b..3e4aa1e1e8f 100644
--- a/src/include/pg_config.h.in
+++ b/src/include/pg_config.h.in
@@ -729,6 +729,9 @@
 /* Define to select named POSIX semaphores. */
 #undef USE_NAMED_POSIX_SEMAPHORES
 
+/* Define to 1 if compiler understands AArch64 NEON intrinsics. */
+#undef USE_NEON
+
 /* Define to 1 to build with OpenSSL support. (--with-ssl=openssl) */
 #undef USE_OPENSSL
 
@@ -741,6 +744,9 @@
 /* Define to 1 to use software CRC-32C implementation (slicing-by-8). */
 #undef USE_SLICING_BY_8_CRC32C
 
+/* Define to 1 if compiler understands x86_64 SSE2 intrinsics. */
+#undef USE_SSE2
+
 /* Define to 1 use Intel SSE 4.2 CRC instructions. */
 #undef USE_SSE42_CRC32C
 
diff --git a/src/makefiles/meson.build b/src/makefiles/meson.build
index 2401025d1cd..a8a041f8b42 100644
--- a/src/makefiles/meson.build
+++ b/src/makefiles/meson.build
@@ -182,7 +182,7 @@ pgxs_empty = [
   'WANTED_LANGUAGES',
 
   # Not needed because we don't build the server / PLs with the generated makefile
-  'LIBOBJS', 'PG_CRC32C_OBJS',
+  'LIBOBJS', 'PG_CRC32C_OBJS', 'USE_NEON', 'HAVE_X86_64_POPCNTQ',
   'PG_TEST_EXTRA',
   'DTRACEFLAGS', # only server has dtrace probes
 
diff --git a/src/port/Makefile b/src/port/Makefile
index 7e9b5877652..c30c6bfe6c0 100644
--- a/src/port/Makefile
+++ b/src/port/Makefile
@@ -48,8 +48,6 @@ OBJS = \
 	pg_getopt_ctx.o \
 	pg_localeconv_r.o \
 	pg_numa.o \
-	pg_popcount_aarch64.o \
-	pg_popcount_x86.o \
 	pg_strong_random.o \
 	pgcheckdir.o \
 	pgmkdirp.o \
@@ -64,6 +62,14 @@ OBJS = \
 	strerror.o \
 	tar.o
 
+ifeq ($(USE_NEON),1)
+OBJS += pg_popcount_aarch64.o
+endif
+
+ifeq ($(HAVE_X86_64_POPCNTQ),1)
+OBJS += pg_popcount_x86.o
+endif
+
 # libpgport.a, libpgport_shlib.a, and libpgport_srv.a contain the same files
 # foo.o, foo_shlib.o, and foo_srv.o are all built from foo.c
 OBJS_SHLIB = $(OBJS:%.o=%_shlib.o)
diff --git a/src/port/meson.build b/src/port/meson.build
index 922b3f64676..b5ff4d0c31f 100644
--- a/src/port/meson.build
+++ b/src/port/meson.build
@@ -11,8 +11,6 @@ pgport_sources = [
   'pg_getopt_ctx.c',
   'pg_localeconv_r.c',
   'pg_numa.c',
-  'pg_popcount_aarch64.c',
-  'pg_popcount_x86.c',
   'pg_strong_random.c',
   'pgcheckdir.c',
   'pgmkdirp.c',
@@ -89,6 +87,7 @@ replace_funcs_pos = [
   ['pg_crc32c_sse42', 'USE_SSE42_CRC32C'],
   ['pg_crc32c_sse42', 'USE_SSE42_CRC32C_WITH_RUNTIME_CHECK'],
   ['pg_crc32c_sb8', 'USE_SSE42_CRC32C_WITH_RUNTIME_CHECK'],
+  ['pg_popcount_x86', 'HAVE_X86_64_POPCNTQ'],
 
   # arm / aarch64
   ['pg_crc32c_armv8', 'USE_ARMV8_CRC32C'],
@@ -96,6 +95,7 @@ replace_funcs_pos = [
   ['pg_crc32c_armv8_choose', 'USE_ARMV8_CRC32C'],
   ['pg_crc32c_armv8_choose', 'USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK'],
   ['pg_crc32c_sb8', 'USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK'],
+  ['pg_popcount_aarch64', 'USE_NEON'],
 
   # loongarch
   ['pg_crc32c_loongarch', 'USE_LOONGARCH_CRC32C'],
-- 
2.50.1 (Apple Git-155)

